A 2K byte fully-associative cache memory with on-chip DRAM control by Scott Griffith and Steve Golson
Abstract: A 2Kbyte cache memory with on-chip DRAM control has been built. The fully-associative write-back write-allocate cache is organized as 128 lines by 16 bytes. The part directly connects to and controls an array of 1 Mb DRAMs forming a 4Mbyte parity-checked memory subsystem. Zero wait state operation of the Intel 80386 microprocessor at 25MHz is supported. Fabricated in a 2µ CMOS process, the 374×383 mil die contains 172K transistors.
The copyright for this paper is owned by IEEE so I can’t put a PDF here. A small number of reprints are available, and I’ll send you one if you email me and ask for it.
This chip project was codenamed Kali and was designed as the memory controller for the Sun 386i workstation (codename Roadrunner). It inspired John Sundman to write a wonderful award-winning hacker-thriller novel Acts of the Apostles.