Author: sgolson
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1994
An annular eclipse occurs when the moon comes between the earth and the sun, however the moon appears smaller than the sun and thus never completely blocks it. At maximum coverage observers on the eclipse track will see a ring of sunlight around the moon. The name comes from the Latin word annulus meaning ‘ring.’ Annular eclipse…
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1994 Synopsys Users Group Conference (SNUG San Jose 1994)
State machine design techniques for Verilog and VHDL by Steve Golson Abstract: Designing a synchronous finite state machine (FSM) is a common task for a digital logic engineer. This paper will discuss a variety of issues regarding FSM design using Synopsys Design Compiler. Verilog and VHDL coding styles will be presented. Different methodologies will be…
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3rd PLD Design Conference, Santa Clara CA (PLDcon 1993)
One-hot state machine design for FPGAs by Steve Golson Abstract: One-hot state machines use one flop per state. They are particularly suited to today’s register-rich FPGA architectures. This paper will discuss the advantages of one-hot state machines including ease of design, simple timing analysis, and high clock rates. An SBus master/slave interface will be used…
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1991
A solar eclipse occurs when the moon comes between the earth and the sun, and the moon casts its shadow on the earth. During totality the sun’s corona becomes visible as a white halo around the black disk of the sun. The sky darkens, but the entire horizon is lit with sunset colors. In this…
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7th VLSI Technology, Inc. Users Group Meeting (1990)
Pushing the Envelope by Steve Golson and Scott Griffith Abstract: Use (and abuse) of VLSI Technology tools for full-custom design.
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1989
A lunar eclipse occurs when the moon enters the earth’s shadow. The Greek philosopher Aristotle observed that during a lunar eclipse the shape of the shadow seen on the moon is always round. The only shape that always casts a round shadow is a sphere; thus Aristotle concluded that the earth was spherical some eighteen…
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1989 Custom Integrated Circuits Conference (CICC 1989)
A 2K byte fully-associative cache memory with on-chip DRAM control by Scott Griffith and Steve Golson Abstract: A 2Kbyte cache memory with on-chip DRAM control has been built. The fully-associative write-back write-allocate cache is organized as 128 lines by 16 bytes. The part directly connects to and controls an array of 1 Mb DRAMs forming…
